1. Field
Embodiments relate to test apparatus of a semiconductor package and methods of testing the semiconductor package using the same.
2. Description of the Related Art
After a front-end process is completed, semiconductor chips obtained from a wafer may be packaged through an assembly process and then may be tested to examine electric characteristics thereof.
The testing process may include an electric test (to examine electric characteristics or defectiveness of the semiconductor chip) and a burn-in test (which may be performed under severe test conditions (e.g., at higher temperature, higher voltage, and higher current than those of the normal operation condition) to examine a life-time or defectiveness of the semiconductor chip).
The electric test may be performed under a test condition in which all I/O terminals of the semiconductor chip are in contact with a test circuit substrate having a test-signal-generating circuit. Thus, whether the semiconductor chip is normally operated and whether there is an electric open in the semiconductor chip may be examined. For example, a handler may be used to perform the electric test.